allinea - Now part of ARM

Debugging and profiling tools for Intel Xeon Phi

Debug, profile, edit, build and deploy Intel Xeon Phi codes


Allinea Forge is the only complete development toolkit for high performance Intel Xeon Phi (Intel MIC architecture) applications and includes:

  • A source-level debugger Allinea DDT : Intel Xeon Phi debugging is supported in Allinea DDT for Offload model, symmetric, and native codes.
    • Multi-process, multi-threaded debugging - simplifying the task of controlling massive concurrency
    • Built-in powerful memory debugging - detects array access errors, dangling pointers and memory leaks without slowing down your application
  • A source-level profiler Allinea MAP : supports profiling native and symmetric codes - (please note for KNC co-processors this requires Intel MPSS 2.1 (mpss_gold_update_3-2.1.6720-19) or later to be installed on the coprocessor).
    • Discover OpenMP and MPI performance bottlenecks
    • Find missed vectorization usage and any slow memory access patterns

With the ability to run over a trillion calculations per second, and using 240 hardware threads, it is important to have easy-to-use, scalable and dependable debugging and performance tools from Allinea.

Our tools fully support the Knights Corner (KNC) Intel® Xeon® Phi™ product family based on Intel® Many Integrated Core (MIC) architecture. 

Our support for the upcoming Knights Landing (KNL) Intel® Xeon® Phi™ product family is coming very soon - please contact us for further details.

Find out more

Read about Allinea tools on Intel Xeon Phi by following our blog:

Or discover how others are using Allinea Forge for Intel Xeon Phi:

View our guide to porting applications to the upcoming Intel Knights Landing platform as we outline how to pursue performance.

I'm Interested - what do I do now?

Register on our trials page to obtain a trial license and explore the benefits of Allinea's tools on Intel Xeon Phi coprocessors.

Read our 6 steps to preparing your code for Intel Knights Landing.